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2011年度

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受賞

  1. 安積(原)祐子, 平成23年度情報処理学会山下記念研究賞, 2012年3月.

論文誌

  1. 柴田誠也, 本田晋也, 冨山宏之, 高田広章, "マルチプロセッサ対応システムレベル設計環境 SystemBuilder-MP,” 電子情報通信学会論文誌D, vol. J94-D, no. 4, pp. 657-670, 2011年4月. [Download]
  2. Hideki Takase, Hiroyuki Tomiyama and Hiroaki Takada, “Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems," IEICE Transactions on Fundamentals, vol. E94-A, no. 10, pp. 1954-1964, Oct. 2011. [Download]
  3. 川内裕文, 谷口一徹, 冨山宏之, 福井正博, "等電力曲線モデルに基づく高精度・高効率RTL電力マクロモデル," 電気学会論文誌C, vol. 131, no. 11, pp. 1907-1914, 2011年11月. [Download]
  4. 立松知紘, 高瀬英希, 曾剛, 川島裕崇, 冨山宏之, 高田広章, "実行トレースを用いた組込みシステムにおけるタスク内DVFSのためのチェックポイント抽出," 情報処理学会論文誌, vol. 52, no. 12, pp. 3729–3744, 2011年12月. [Download]
  5. Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, "A Novel Framework for Effective Preemptive Hardware Multitasking on FPGAs," IEICE Transactions on Information and Systems, vol. E95-D, no. 2, pp. 345-353, Feb. 2012. [Download]
  6. Seiya Shibata, Yuki Ando, Shinya Honda, Hiroyuki Tomiyama and Hiroaki Takada, "A Fast Performance Estimation Framework for System-Level Design Space Exploration," IPSJ Transactions on System LSI Design Methodology, vol. 5, pp. 44-54, Feb. 2012. [Free Download]

国際会議

  1. Kohei Aoki, Ittetsu Taniguchi, Hiroyuki Tomiyama, Masahiro Fukui, "Architecture Optimization based on a Branch-and-Bound Strategy for Low-Energy Embedded VLIW Processors," In Proc. of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 207-210, Gyeongju, Korea, June 2011.
  2. Mitsuya Uchida, Ittetsu Taniguchi, Hiroyuki Tomiyama, Masahiro Fukui, "Energy-Aware ILP-based Instruction Scheduling for Fine-Grained Power-Gated VLIW Processors," In Proc. of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 211-214, Gyeongju, Korea, June 2011.
  3. Hiroyuki Tomiyama, "Challenges of Programming Embedded Many-Core SoCs with OpenCL," International Forum on Embedded MPSoC and Multicore (MPSoC), Beaune, France, July 2011.
  4. Hideki Takase, Gang Zeng, Lovic Gauthier, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Yoshitake Kobayashi, Shunitsu Kohara, Takenori Koshiro, Tohru Ishihara, Hiroyuki Tomiyama and Hiroaki Takada, "An Integrated Optimization Framework for Reducing the Energy Consumption of Embedded Real-Time Applications," In Proc. of International Symposium on Low-Power Electronics and Design (ISLPED), pp. 271-276, Fukuoka, Japan, August 2011.
  5. Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor, "An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating," In Proc. of Euromicro Conference on Digital System Design (DSD), pp. 693-700, Oulu, Finland, Aug. 2011.
  6. Yuki Ando, Seiya Shibata, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada, "Fast Design Space Exploration for Mixed Hardware-Software Embedded Systems," In Proc. of International SoC Design Conference (ISOCC), pp. 92-95, Jeju, Korea, Nov. 2011.
  7. Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda, Hiroaki Takada, “Hardware Multitasking in Dynamically Partially Reconfigurable FPGA-based Embedded Systems,” In Proc. of International SoC Design Conference (ISOCC), Invited paper, pp. 183-186, Jeju, Korea, Nov. 2011.
  8. Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda and Hiroaki Takada, "Rainbow - An OS Extension for Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs," In Proc. of International Conference on ReConFigurable Computing and FPGAs (ReConFig), pp. 416-421, Cancun, Mexico, Nov.-Dec. 2011.
  9. Yuko Hara-Azumi, Hiroyuki Tomiyama, “Clock-Constrained Simultaneous Allocation and Binding for Multiplexer Optimization in High-Level Synthesis,” In Proc. of Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 251-256, Sydney, Australia, Jan.-Feb. 2012.
  10. Yuko Hara-Azumi, Hiroyuki Tomiyama, Shigeru Yamashita, Nikil D. Dutt, "High-Level Synthesis Using Partially-Programmable Resources for Yield Improvement," In Proc. of Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI), pp. 414-419, Beppu, Mar. 2012.
  11. Nakajima Keita, Takuji Hieda, Ittetsu Taniguchi and Hiroyuki Tomiyama, "An NoC Virtual Platform Based on QEMU and SystemC," Poster presentation at Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (DEPCP) in conjunction with Design Automation and Test in Europe (DATE), Dresden, Germany, March 2012.
  12. Takuji Hieda, Naoki Nishiyama, Ittetsu Taniguchi, Hiroyuki Tomiyama and Koji Inoue, "An OpenCL Implementation Supporting Task Parallel Execution on Embedded Many-core Architecture," Poster presentation at Workshop on Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (DEPCP) in conjunction with Design Automation and Test in Europe (DATE), Dresden, Germany, March 2012.

国内学会

  1. 谷口一徹, 森川敏雄, 冨山宏之, 福井正博, "領域別回帰分析に基づく高精度・高効率RTL電力マクロモデリング手法," 第24回 回路とシステムワークショップ 論文集, pp. 407-412, 淡路, 2011年8月.
  2. 安藤友樹, 柴田誠也, 本田晋也, 高田広章, 冨山宏之, "ソフトウェア・ハードウェア混在システム向けの効率的な設計空間探索手法," DAシンポジウム論文集, pp. 3-8, 下呂, 2011年8月.
  3. 柴田誠也, 石川拓也, 本田晋也, 冨山宏之, 高田広章, "上流設計におけるバス調停遅延時間の見積もりのための確率的数学モデル," DAシンポジウム論文集, pp. 159-164, 下呂, 2011年8月.
  4. Krzysztof Jozwik, Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada, "Preemptive Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs: Hardware and Reconfiguration Layers," 電子情報通信学会RECONF研究会, 2011年9月. 
  5. 高島史明, 石浦菜岐佐, 織野真琴, 冨山宏之, 神原弘之, "アセンブリコードを中間表現とする高位合成における関数の併合," 電子情報通信学会RECONF/CPSY/VLD/情報処理学会SLDM研究会, 2012年1月.
  6. 織野真琴, 石浦菜岐佐, 冨山宏之, 高島史明, 神原弘之, "ソフトウェアと再リンク可能なハードウェアの高位合成," 電子情報通信学会RECONF/CPSY/VLD/情報処理学会SLDM研究会, 2012年1月.
  7. 中島啓太, 稗田拓路, 谷口一徹, 冨山宏之, "QEMUとSystemCを用いたNoC向け仮想プラットフォームの開発," 電子情報通信学会CPSY/DC/情報処理学会SLDM/EMB研究会, 松島, 2012年3月. 
  8. 稗田拓路, 西山直樹, 谷口一徹, 冨山宏之, 井上弘士, "組込みシステム向けメニーコア用OpenCL環境," 電子情報通信学会CPSY/DC/情報処理学会SLDM/EMB研究会, 松島, 2012年3月.

その他

  1. 冨山宏之, "システムレベル設計の動向とSystemCの役割," 基調講演, SystemC Japan, 2011年7月16日.
  2. 冨山宏之, "組み込みシステムの低消費電力化技術の基礎と技術動向," 日本テクノセンター, 2011年12月13日.
  3. 井上弘士, 冨山宏之, 近藤正章, "SMYLEプロジェクトの紹介とメニーコア・プロセッサSMYLErefの開発," NEDO主催・第1回メニーコアシンポジウム, 2012年3月30日.